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  ?2014 silicon storage technology, inc. ds-70005004g 10/14 data sheet www.microchip.com features ? input/output ports internally matched to 50 ? and dc decoupled ? high gain: ? typically 28 db gain across 2.4?2.5 ghz ? high linear output power: ? >24 dbm p1db - single-tone measurement. please refer to ?absolute maximum stress ratings? on page 5 ? meets 802.11g ofdm acpr requirement up to 21.5 dbm ? 3% evm up to 18 dbm for 54 mbps 802.11g signal ? 2.5% evm up to 17 dbm for 802.11n, mcs7, 40 mhz ? meets 802.11b acpr requirement up to 22.5 dbm ? meets bluetooth ? spectrum mask for 3 mbps at 17 dbm typical ? high power-added efficiency/low operating cur- rent for 802.11b/g/n applications ? ~28%/138 ma @ p out = 21.5 dbm for 802.11g ? ~33%/155 ma @ p out = 22.5 dbm for 802.11b ? single-pin low i ref power-up/down control ?i ref <2 ma ? low idle current ? ~60 ma i cq ? high-speed power-up/down ? turn on/off time (10%- 90%) <100 ns ? typical power-up/down delay with driver delay included <200 ns ? low shut-down current (~2 a) ? stable performance over temperature ? ~2 db gain variation between -40c to +85c ? ~1 db power variation between -40c to +85c ? excellent on-chip power detection ? >15 db dynamic range, db-wise linear ? vswr insensitive, temperature stable ? packages available ? 8-contact x2son ? 2mm x 2mm x 0.4mm ? 8-contact uson ? 2mm x 2mm x 0.6mm ? non-pb (lead-free), rohs compliant, and halogen free applications ? wlan (ieee 802.11b/g/n) ? bluetooth ? ? cordless phones ? 2.4 ghz ism wireless equipment 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e sst12lp17e is a 2.4 ghz high-efficiency, fully-matched power amplifier module based on the highly-reliable ingap/gaas hbt technology. it is designed in compli- ance with ieee 802.11b/g/n applications and typically provides 28 db gain with 28% power-added efficiency at 21dbm. sst12lp17e has excellent linearity, providing 3% evm at typically 18 dbm, while meeting 802.11g spectrum mask at 21.5 dbm. this power amplifier requires no external rf matching, and only requires one exter- nal dc-bias capacitor to meet the specified performance. it offers high-speed power-up/-down control through a single reference voltage pin and includes a tem- perature-stable, vswr insensitive power detector voltage output. sst12lp17e is offered in a super-thin (0.4mm maximum) 8-contact x2son package and a 8-con- tact uson package. downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 2 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet product description the sst12lp17e is a versatile power amplifier based on the highly-reliable ingap/gaas hbt tech- nology.the input/output rf ports are fully matched to 50 ?? internally. these rf ports are dc decoupled and require no dc-blocking capacitors or matching components. this helps reduce the system board?s bill of materi- als (bom) cost. sst12lp17e is a 2.4 ghz fully-integrated, high-efficiency power amplifier module designed in compli- ance with ieee 802.11b/g/n applications. it typically provides 28 db gain with 28% power-added effi- ciency (pae) @ pout = 21.5 dbm for 802.11g and 33% pae @ pout = 22.5 dbm for 802.11b. this power amplifier has excellent linearity, typically 3% added evm at 18 dbm output power which is essential for 54 mbps 802.11g operation while meeting 802.11g spectrum mask at 21.5 dbm and 802.11b spectrum mask at 22.5 dbm. using mcs7 modulation, with 40 mhz bandwidth, the sst12lp17e provides 17 dbm at 2.5% evm. the device also features easy board-level usage along with high-speed power-up/down control through a single combined reference voltage pin. ultra-low reference current (total i ref ~2 ma) makes the sst12lp17e control- lable by an on/off switching signal directly from the baseband chip. these features, coupled with low operating current, make the sst12lp17e ideal for the final stage power amplification in battery-powered 802.11b/g/n wlan transmitter and bluetooth applications. the sst12lp17e has an e xcellent on-chip, single-ended power detector, which features wide dynamic-range, >15 db, with db-wise linear performance. the e xcellent on-chip power detector provides a reliable solution to board-level power control. the sst12lp17e is offered in both 8-contact x2son and 8-contact uson packages. see figure 2 for pin assignments and table 1 for pin descriptions. downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 3 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet functional blocks figure 1: functional block diagram bias circuit 1426 f1.1 4 3 2 1 5 6 7 8 vcc2 rfin vref vcc1 dnu rfout dnudet downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 4 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet pin assignments figure 2: pin assignments for 8-contact x2son and 8-contact uson pin descriptions table 1: pin description symbol pin no. pin name type 1 1. i=input, o=output function gnd 0 ground low inductance ground pad vcc2 1 power supply pwr power supply, 2 nd stage vcc1 2 power supply pwr power supply, 1 st stage rfin 3 i rf input, dc decoupled vref 4 pwr 1 st and 2 nd stage idle current control det 5 o on-chip power detector rfout 6 o rf output, dc decoupled dnu 7 do not use do not use or connect dnu 8 do not use do not use or connect t1.0 75004 4 3 2 1 5 6 7 8 vcc2 rfin vref vcc1 dnu rfout dnu top view rf & dc ground 0 (contacts facing down) det 1426 f2.0 downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 5 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet electrical specifications the dc and rf specifications for the power amplifier are specified below. refer to table 3 for the dc voltage and current specifications. refer to figures 3 through 8 for the rf performance. absolute maximum stress ratings (applied conditions greater than those listed under ?absolute maximum stress ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. exposure beyond absolute maximum stress rat- ing conditions may affect device reliability.) input power to pin 3 (p in )..................................................... +5dbm average output power from pin 6 (p out ) 1 ...................................... +25.5 dbm 1. never measure with cw source. pulsed single-tone source with <50% duty cycle is recommended. exceeding the max- imum rating of average output power could cause permanent damage to the device. supply voltage at pins 1 and 2 (v cc ) 2 ...................................... -0.3v to +6.0v 2. v cc maximum rating of 6.0v for rf output power levels up to 10 dbm. reference voltage to pin 4 (v ref )......................................... -0.3v to +3.3v dc supply current (i cc ) 3 ..................................................... 300ma 3. measured with 100% duty cycle 54 mbps 802.11g ofdm signal operating temperature (t a )............................................. -40oc to +85oc storage temperature (t stg ) ........................................... -40oc to +120oc maximum junction temperature (t j )............................................ +150oc surface mount solder reflow temperature ............................ 260c for 10 seconds esd level for human body model, hbm ......................................... 1250v table 2: operating range range ambient temp v cc industrial -40c to +85c 3.0v to 4.6v t2.1 75004 table 3: dc electrical characteristics at 25c symbol parameter min. typ max. unit v cc supply voltage at pins 1 and 2 3.0 3.3 4.6 v i cq idle current to meet evm ~3% @ 18 dbm output power, 802.11g ofdm 54 mbps signal 60 ma v reg reference voltage for pin 4 2.9 v i cc current consumption to meet 802.11g ofdm 54 mbps spectrum mask @ 21.5 dbm 138 ma current consumption to meet 802.11b dsss 54 mbps spectrum mask @ 22 dbm 155 ma current consumption to meet evm ~3% @ 18 dbm output power with 802.11g ofdm 54 mbps signal 105 ma t3.1 75004 downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 6 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet table 4: rf characteristics at 25c symbol parameter min. typ max. unit f l-u frequency range 2412 2484 mhz g small signal gain 27 28 db g var1 gain variation over band (2412?2484 mhz) 0.5 db g var2 gain ripple over channel (20 mhz) 0.2 db 2f, 3f, 4f, 5f harmonics at 23 dbm, without external filters -40 dbc evm evm @ 18 dbm output with 802.11g ofdm 54 mbps signal 3% evm @ 17 dbm output with mcs7-40 mhz band- width 2.5 % p out output power to meet 802.11g ofdm 54 mbps spectrum mask 20.5 21.5 dbm output power to meet 802.11b dsss 1 mbps spectrum mask 21 22.5 dbm t4.2 75004 table 5: characteristics at 25c for bluetooth applications symbol parameter min. typ max. unit f l-u frequency range 2412 2484 mhz g small signal gain (configured as shown in figure 9 on page 10) 26 28 db small signal gain (v ref = 3.0v with 1.5k series resistor) 23 26 db icc dc current at 17 dbm cw (configured as shown in figure 9 on page 10) 100 ma dc current at 12 dbm cs (v ref = 3.0v with 1.5k series resistor) 50 ma power meeting bluetooth spectrum power density using 3 mbps modulation (-20 dbm at 1.5 mhz and -40 dbm at 2.5 mhz, 100 khz rbw) (configured as shown in figure 9 on page 10) 17 dbm meeting bluetooth spectrum power density using 3 mbps modulation (-20 dbm at 1.5 mhz and -40 dbm at 2.5 mhz, 100 khz rbw) (v ref = 3.0v with 1.5k series resistor) 12 dbm t5.2 75004 downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 7 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet typical performance characteristics test conditions: v cc = 3.3v, t a = 25c, unless otherwise specified figure 3: s-parameters 1426 s-parms.1.2 -60 -50 -40 -30 -20 -10 0 10 012345678910 mag (db) frequency (ghz) s11 versus frequency -60 -50 -40 -30 -20 -10 0 10 012345678910 mag (db) frequency (ghz) s12 versus frequency -50 -40 -30 -20 -10 0 10 20 30 40 012345678910 mag (db) frequency (ghz) s21 versus frequency -60 -50 -40 -30 -20 -10 0 10 012345678910 mag (db) frequency (ghz) s22 versus frequency downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 8 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet typical performance characteristics test conditions: v cc = 3.3v, t a = 25c, 54 mbps 802.11g ofdm signal equalizer training setting using channel estimation sequence only figure 4: evm versus output power figure 5: power gain versus output power 1426 f4.2 0 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 21 22 evm (%) output power (dbm) evm versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz 1426 f5.2 10 12 14 16 18 20 22 24 26 28 30 10 11 12 13 14 15 16 17 18 19 20 21 22 power gain (db) output power (dbm) power gain versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 9 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet figure 6: total current consumption for 802.11g operation versus output power figure 7: pae versus output power 1426 f6.2 40 50 60 70 80 90 100 110 120 130 140 150 160 170 10 11 12 13 14 15 16 17 18 19 20 21 22 supply current (ma) output power (dbm) supply current versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz 1426 f7.2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 10 11 12 13 14 15 16 17 18 19 20 21 22 pae (%) output power (dbm) pae versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 10 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet figure 8: detector characteristics versus output power figure 9: typical schematic for high-efficiency 802.11b/g/n applications 1426 f8.2 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 10 11 12 13 14 15 16 17 18 19 20 21 22 detector voltage (v) output power (dbm) detector voltage versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz 1426 f9.3 4.7 f * 50 rfin rfout 50 vdet vreg 12lp17e 2x2 8l x2son top view 4 3 2 1 5 6 7 8 vcc * v cc1 and v cc2 must be separated by a short inductive trace. this can be replaced by a 1 nh inductor if prefered. 2mm trace* downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 11 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet product ordering information valid combinations for sst12lp17e sst12lp17e -xx8e SST12LP17E-QU8E sst12lp17e evaluation kits sst12lp17e -xx8e-k sst12lp17e-q u8e-k note: valid combinations are those products in mass production or will be in mass production. consult your sst sales representative to confirm availability of valid combinations and to determine availability of new combi- nations. sst 12 lp 17e - xx8e xx xx xxx - xxxx environmental attribute e 1 = non-pb contact (lead) finish package modifier 8 = 8 contact package type xx = x2son qu = uson product family identifier product type p = power amplifier voltage l = 3.0-3.6v frequency of operation 2 = 2.4 ghz product line 1 = rf products 1. environmental suffix ?e? denotes non-pb sol- der. sst non-pb solder devices are ?rohs compliant?. downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 12 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet packaging diagrams for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: microchip technology drawing c04-14006a sheet 1 of 1 8-lead ultra thin small outline no-leads (qu8e/f) - 2x2 mm body [uson] note: 1. similar to jedec jep95 xqfn/xson variants, though number of contacts and some dime nsions are different. 2. the topside pin #1 indicator is laser engraved; its approximate shape and location is as shown. 3. from the bottom view, the pin #1 indicator may be either a curved indent or a 45-d egree chamfer. 4. the external paddle is electrically connected to the die back-side and to vss. this paddle must be soldered to the pc board; it is required to connect this paddle to the vss of the unit. connection of this paddle to any other voltage potential will result in shorts and electr ical malfunction of the device. 5. untoleranced dimensions are nominal target dimensions. 6. all linear dimensions are in millimeters (max/min). downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 13 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet b a 0.10 c 0.10 c 0.08 c a b 0.05 c (datum b) (datum a) c seating plane 12 n 2x top view side view bottom view for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging 1rwh note 1 12 n 0.10 c a b 0.10 c a b 0.10 c 0.08 c microchip technology drawing c04-201-xx8e-a sheet 1 of 2 2x 8x d e d2 e2 8x k 8x b 8x l l2 e 2 e a a1 notes 1 & 2 7huplqdo6xshu7klq3odvwlf 6pdoo2xwolqh1r/hdg3dfndjh ; ;( [[pp 0d[ %rg\> ;621@ downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 14 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet microchip technology drawing c04-201-xx8e-a sheet 2 of 2 for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging 1rwh number of terminals overall height terminal width overall width overall length terminal length exposed pad width exposed pad length pitch standoff units dimension limits a1 a b d e2 d2 e l e n 0.40 bsc 0.701.55 0.25 0.15 0.34 0.00 0.20 2.00 bsc 0.30 1.60 0.75 0.370.02 2.00 bsc millimeters min nom 8 0.801.65 0.35 0.25 0.400.05 max k- 0.20 - ref: reference dimension, usually without tolerance, for information purposes only. bsc: basic dimension. theoretically exact value shown without tolerances. 1. 2.4. noes: pin 1 visual index feature may vary, but must be located within the hatched area. pin 1 index on exposed pad may be curved indentation or 45 chamfer dimensioning and tolerancing per asme y14.5m terminal-to-exposed-pad 7huplqdo6xshu7klq3odvwlf 6pdoo2xwolqh1r/hdg3dfndjh ; ;( [[pp 0d[ 3. package is saw singulated terminal center-to-center l2 1.55 bsc %rg\> ;621@ downloaded from: http:///
?2014 silicon storage technology, inc. ds-70005004g 10/14 15 2.4 ghz high-efficiency, high-gain power amplifier module sst12lp17e data sheet table 6: revision history revision description date 00 ? initial release of data sheet apr 2010 a ? modified ?features?, ?product description? on page 2, table 1 on page 4, table 3 on page 5, table 4 on page 6, figure 1 on page 3, and figure 9 on page 10. ? replaced figures 3-8. apr 2011 b ? updated document type to ?data sheet? ? changed supply voltage in ?electrical specifications? on page 5 ? revised vcc values in table 3 on page 5 oct 2011 c ? updated package to 8-contact x2son (xx8) ? revised performance information to reflect new package type including tables 2, 3, and 4 ? revised supply voltage on page 5. feb 2012 d ? added qu8 package information ? updated maximum supply voltage from 5.5v to 6.0v in ?absolute maxi- mum stress ratings? on page 5 ? updated supply voltage from 4.2 to 4.6 in table 3 on page 5 mar 2012 e ? updated package drawings to reflect new pin 1 indicator jul 2012 f ? updated figure 1 on page 3 ? updated figure 9 on page 10 ? added table 5 on page 6 ? updated ?features? on page 1 ? added esd information to ?electrical specifications? on page 5 mar 2014 g ? updated ?features? on page 1 and ?product description? on page 2 ? revised table 4 on page 6 oct 2014 ? 2014 microchip technology inc. sst, silicon storage technology, the sst logo, superflash, and mtp are registered trademarks of microchip technology, inc. mpf, sqi, serial quad i/o, and z-scale are trademarks of microchip technology, inc. all other trademarks and registered trade- marks mentioned herein are the property of their respective owners. specifications are subject to change without notice. refer to www.microchip.com for the most recent documentation. for the most current package drawings, please see the packaging specification located at http://www.microchip.com/packaging. memory sizes denote raw storage capacity; actual usable capacity may be less. microchip makes no warranty for the use of its products other than those expressly contained in the standard terms and conditions of sale. for sales office locations and information, please see www.microchip.com. www.microchip.com isbn:978-1-63276-663-2 downloaded from: http:///


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